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CodeGenSCAD Module

This module implements functions for generating code for BED architectures like SCAD from dataflow graphs (DPNs).

Types

Type Description

TwoSAT

Given a PU allocation, the SAT constraints (without switching Dup nodes) yields a 2SAT problem which is described by the following data type that offers facts for the node and buffer ordering as well as constraints which are equivalences between the latter.

Functions and values

Function or value Description

AllocProcUnitsByModuloIndices numPU dpn

Full Usage: AllocProcUnitsByModuloIndices numPU dpn

Parameters:
Returns: int * Map<int, int>

Compute a PU allocation by modulo operation on node indices; the function returns a pair (numPU,allocMap) where numPU is the number of PUs used and allocMap is a map to assign each DPN node a PU

numPU : int
dpn : DataflowProcessNetwork
Returns: int * Map<int, int>

AllocProcUnitsByRandomMap numPU dpn

Full Usage: AllocProcUnitsByRandomMap numPU dpn

Parameters:
Returns: int * Map<int, int>

Compute a random PU allocation for numPU processing units; the function returns a pair (numPU,allocMap) where numPU is the number of PUs used and allocMap is a map to assign each DPN node a PU

numPU : int
dpn : DataflowProcessNetwork
Returns: int * Map<int, int>

AllocProcUnitsByVertexDisjointCover dpn

Full Usage: AllocProcUnitsByVertexDisjointCover dpn

Parameters:
Returns: int * Map<int, int>

Compute a PU allocation by a minimal vertex disjoint node cover; the function returns a pair (numPU,allocMap) where numPU is the number of PUs used and allocMap is a map to assign each DPN node a PU

dpn : DataflowProcessNetwork
Returns: int * Map<int, int>

CodeGenSCAD beQuiet constMode varMap nodeOrd nodeAsg dpn

Full Usage: CodeGenSCAD beQuiet constMode varMap nodeOrd nodeAsg dpn

Parameters:
Returns: bool * MoveCode list
 SCAD code generation with a given node ordering and PU assignment: The
 function performs a symbolic simulation to determine a buffer ordering
 for the given node order and returns (success,mvProg) with a move code
 program mvProg. The value success is false if no buffer ordering has
 been found or if the buffer size was not sufficient, and in this case,
 mvProg is the prefix of a program until a deadlock was reached.
 You may have to increase the buffer size (variable bufSize in module
 MoveCode) to make the code generator work in the latter case. Parameter
 beQuiet is used to suppress the printing of the processor state during
 code generation. Usually, inputs are read from LSU.out and outputs are
 written to LSU.val; using constMode=true, input values are provided
 instead via the parameter varMap as constants.
  Since DPN buffers are associated with move instructions, the code 
 generator assumes that input and output buffers have different names. If
 that is not the case, then either the input or output buffers must be
 renamed.
beQuiet : bool
constMode : bool
varMap : Map<string, int>
nodeOrd : int list[]
nodeAsg : Map<int, int>
dpn : DataflowProcessNetwork
Returns: bool * MoveCode list

CodeGenWithMinBufSize initBufSize beQuiet constMode varMap nodeOrd nodeAsg dpn

Full Usage: CodeGenWithMinBufSize initBufSize beQuiet constMode varMap nodeOrd nodeAsg dpn

Parameters:
    initBufSize : int
    beQuiet : bool
    constMode : bool
    varMap : Map<string, int>
    nodeOrd : int list[]
    nodeAsg : Map<int, int>
    dpn : DataflowProcessNetwork

Returns: bool * MoveCode list

This function starts with the given buffer size and calls CodeGenSCAD; if it fails with buffer-size-too-small exception, the buffer size is increased until either the code is generated successfully or fails for another reason.

initBufSize : int
beQuiet : bool
constMode : bool
varMap : Map<string, int>
nodeOrd : int list[]
nodeAsg : Map<int, int>
dpn : DataflowProcessNetwork
Returns: bool * MoveCode list

GetInBufOfPU nodeAsg dpn bf

Full Usage: GetInBufOfPU nodeAsg dpn bf

Parameters:
Returns: TgtAdr

buffer mapping: map a buffer bf of the DPN dpn to the input buffer of a PU in a BED processor architecture with two input and two output buffers

nodeAsg : Map<int, int>
dpn : DataflowProcessNetwork
bf : string
Returns: TgtAdr

GetOrderAndAllocation variables nodLevels bufLevels model

Full Usage: GetOrderAndAllocation variables nodLevels bufLevels model

Parameters:
    variables : 'a seq
    nodLevels : Set<int> array
    bufLevels : Set<string> array
    model : Map<'a, bool>

Returns: int list array * string list array * Map<int, int> * Set<int>

Given a model of the constraints generated by MkConstraintsSAT, this extracts the node/buffer orders, the PU allocation, and the set of Dup nodes that were switched by the model. It also requires the set of variables, and the sets of nodes and buffers (possibly split into levels). The function returns a tuple (nodOrder,bufOrder,nodeAsg,switchDupNodes) where nodOrder contains the sorted list of nodes per level, bufOrder contains the sorted list of buffers per level, nodeAsg is the PU assignment that maps nodes to PUs, and switchDupNodes is the set of Dup nodes that have to be switched.

variables : 'a seq
nodLevels : Set<int> array
bufLevels : Set<string> array
model : Map<'a, bool>
Returns: int list array * string list array * Map<int, int> * Set<int>

GetOutBufOfPU nodeAsg dpn bf

Full Usage: GetOutBufOfPU nodeAsg dpn bf

Parameters:
Returns: SrcAdr

buffer mapping: map a buffer bf of the DPN dpn to the output buffer of a PU in a BED processor architecture with two input and two output buffers

nodeAsg : Map<int, int>
dpn : DataflowProcessNetwork
bf : string
Returns: SrcAdr

MkConstraintsSAT puNum allowSwitchDup optLevelInfo dpn

Full Usage: MkConstraintsSAT puNum allowSwitchDup optLevelInfo dpn

Parameters:
Returns: Set<int> array * Set<string> array * Set<BoolExpr> * Set<BoolExpr>

This function generates constraints for code generation from dataflow graphs that may or may not be leveled for a SCAD machine with 2x2 PUs. If the given dpn is leveled, optLevelInfo should be a triple of the form (nodLevel,bufLevel,maxNodLevel) where nodLevel maps the DPN nodes to a level number, bufLevel maps the buffers of the DPN to a level number, and maxNodLevel is the number of levels. The parameter puNum is the number of 2x2 PUs of the SCAD machine. The result (nodLevels,bufLevels,variables,constraints) consists of arrays nodLevels and bufLevels where nodLevels[i] and bufLevels[i] are the set of nodes and buffers of level i, respectively; variables is the set of variables, and constraints is the set of generated constraints. The constraints use the following variables: nodOrd{i,j} holds if node i fires before node j in the schedule, bufOrd{bf1,bf2} holds if the move instruction corresponding to bf1 is done before that one of bf2, asgVar{i,p} holds, if node i is mapped to PU p, and swD{i} holds iff Dup node i shall switch its outputs.

puNum : int
allowSwitchDup : bool
optLevelInfo : (Map<int, int> * Map<string, int> * int) option
dpn : DataflowProcessNetwork
Returns: Set<int> array * Set<string> array * Set<BoolExpr> * Set<BoolExpr>

MkConstraintsSMT puNum optLevelInfo dpn

Full Usage: MkConstraintsSMT puNum optLevelInfo dpn

Parameters:
Returns: Set<int> array * Set<string> array * Set<BoolExpr> * Set<NatExpr> * Set<BoolExpr>

This function generates constraints for code generation from dataflow graphs that may or may not be leveled for a SCAD machine with 2x2 PUs. If the given dpn is leveled, optLevelInfo should be a triple of the form (nodLevel,bufLevel,maxNodLevel) where nodLevel maps the DPN nodes to a level number, bufLevel maps the buffers of the DPN to a level number, and maxNodLevel is the number of levels. The parameter puNum is the number of 2x2 PUs of the SCAD machine. The result (nodLevels,bufLevels,variablesBool,variablesNat,constraints) consists of arrays nodLevels and bufLevels where nodLevels[i] and bufLevels[i] are the set of nodes and buffers of level i, respectively; variablesBool and variablesNat are the variables of types bool and nat, respectively, and constraints is the set of generated constraints. The constraints use the following variables: nodAt{i} is the point of time when node i fires in the schedule, bufAt{bf} is the point of time when the move instruction of buffer bf is done, nod2PU{i} is the PU assigned to node i, and swD{i} holds iff the Dup node i shall switch its outputs.

puNum : int
optLevelInfo : (Map<int, int> * Map<string, int> * int) option
dpn : DataflowProcessNetwork
Returns: Set<int> array * Set<string> array * Set<BoolExpr> * Set<NatExpr> * Set<BoolExpr>

MkTwoSatConstraintsWithAlloc optLevelInfo alpha dpn

Full Usage: MkTwoSatConstraintsWithAlloc optLevelInfo alpha dpn

Parameters:
Returns: Set<TwoSAT>

MkTwoSatConstraintsWithAlloc generates with a given PU allocation alpha (where alpha[i] is the PU of dpn.nodes[i]) a 2SAT problem, i.e., a set of constraints of type TwoSAT. The constraints do neither take care of transitivity nor of switching the output of DUP nodes.

optLevelInfo : (Map<int, int> * Map<string, int> * int) option
alpha : Map<int, int>
dpn : DataflowProcessNetwork
Returns: Set<TwoSAT>

SolveConstraintsSAT useZ3 puNum allowSwitchDup optLevelInfo dpn

Full Usage: SolveConstraintsSAT useZ3 puNum allowSwitchDup optLevelInfo dpn

Parameters:
    useZ3 : bool
    puNum : int
    allowSwitchDup : bool
    optLevelInfo : (Map<int, int> * Map<string, int> * int) option
    dpn : DataflowProcessNetwork

Returns: (int list array * string list array * Map<int, int> * Set<int>) option

SolveConstraintsSAT generates the SAT constraints by MkConstraintsSAT, solves them by either Averest's internal SAT solver of Microsoft's Z3 (depending on useZ3), and extracts the orders and PU allocation with GetOrderAndAllocation.

useZ3 : bool
puNum : int
allowSwitchDup : bool
optLevelInfo : (Map<int, int> * Map<string, int> * int) option
dpn : DataflowProcessNetwork
Returns: (int list array * string list array * Map<int, int> * Set<int>) option

SolveConstraintsSATminPU useZ3 allowSwitchDup optLevelInfo dpn

Full Usage: SolveConstraintsSATminPU useZ3 allowSwitchDup optLevelInfo dpn

Parameters:
Returns: int list array * string list array * Map<int, int> * Set<int>

SolveConstraintsSATminPU applies SolveConstraintsSAT for numPU=1,2,... until it finally succeeds.

useZ3 : bool
allowSwitchDup : bool
optLevelInfo : (Map<int, int> * Map<string, int> * int) option
dpn : DataflowProcessNetwork
Returns: int list array * string list array * Map<int, int> * Set<int>

SolveTwoSatConstraintsWithTransHull alpha dpn

Full Usage: SolveTwoSatConstraintsWithTransHull alpha dpn

Parameters:
Returns: (Map<int, Set<int>> * Map<string, Set<string>>) option * int

clusters which are closed under transitivity and which merged in case that these are overlapping, i.e., in case their node/buffer ordering constraints do overlap. Each cluster consists of a pair (nodOrd,bufOrd) which are the node and buffer ordering constraints that are equivalent to each other. The first cluster equCluster[0] has a speical role since its entries are the facts that must hold for the node and buffer ordering. After partitioning the equivalences into non-overlapping classes, the function randomly picks an equivalence cluster (other than the first one) and merges it with the first one. This process is carried out repeatedly until a model is found (i.e., no further equivalence cluster exists that could be merged) or if the first cluster got a cycle. In the latter case, backtracking is applied in that the latest decision, i.e., the latest cluster merged is taken back and it is reversed and then merged again.

alpha : Map<int, int>
dpn : DataflowProcessNetwork
Returns: (Map<int, Set<int>> * Map<string, Set<string>>) option * int

Verify2SatSolution (nodOrd, bufOrd) constr

Full Usage: Verify2SatSolution (nodOrd, bufOrd) constr

Parameters:
    nodOrd : int[]
    bufOrd : string[]
    constr : TwoSAT seq

Returns: bool

verify that a computed solution (nodOrd,bufOrd) indeed satisfies given 2SAT constraints (nodOrdInit,bufOrdInit,equClusterInit); it is expected that the given orders have enough transitive constraints, so that the function does not compute the transitive hull in advance

nodOrd : int[]
bufOrd : string[]
constr : TwoSAT seq
Returns: bool

VertexDisjointCover2MoveCode constMode varMap dpn

Full Usage: VertexDisjointCover2MoveCode constMode varMap dpn

Parameters:
Returns: int * int list[] * Map<int, int> * DataflowProcessNetwork * Set<int * int> * int list list * MoveCode list

Generate move code from a DPN that is based on a vertex-disjoint path cover. The function first levelizes the DPN, then computes a minimal vertex-disjoint path cover using MinimumNumberOfVertexDisjointPathsDPN. It then derives the assignment to processing units from the vertex-disjoint path cover and orders the obtained threads randomly (by converting the set to a list). Note that by the levelization, the thread ordering also determines a node ordering in that nodes are primarily ordered by their levels, and nodes of the same level are ordered by their thread number. Using this node ordering, and PU assignment, function CodeGenSCAD is used to generate the move code with a certificate (a symbolic execution). The result is a tuple (puNum,nodeOrd,nodeAsg,dpnLeveled,edges,threadL,mvProg) where puNum is the number of PUs used, nodeOrd is the node ordering, nodeAsg is the PU assignment, dpnLeveled is the leveled DPN, edges is the set of edges used by the vertex-disjoint path cover, and threadL is the set of vertex-disjoint paths (ordered randomly). Finally, mvProg is the generated move code program.

constMode : bool
varMap : Map<string, int>
dpn : DataflowProcessNetwork
Returns: int * int list[] * Map<int, int> * DataflowProcessNetwork * Set<int * int> * int list list * MoveCode list

WriteTwoSatConstraints2Dot ostr (nodOrd, bufOrd, equCluster, nodCycle, bufCycle)

Full Usage: WriteTwoSatConstraints2Dot ostr (nodOrd, bufOrd, equCluster, nodCycle, bufCycle)

Parameters:
    ostr : TextWriter
    nodOrd : Map<int, 'a>
    bufOrd : Map<string, 'b>
    equCluster : ('c * 'd) seq
    nodCycle : (int * int) option
    bufCycle : (string * string) option

write the preliminary node/buffer orders and remaining equivalences to a graph in graphviz format (additional edges on nodes or buffers which may close a cycle are drawn in red)

ostr : TextWriter
nodOrd : Map<int, 'a>
bufOrd : Map<string, 'b>
equCluster : ('c * 'd) seq
nodCycle : (int * int) option
bufCycle : (string * string) option

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